1. Field of the Invention
The invention relates to a semiconductor process.
2. Description of Related Art
With advancement of technologies, the level of integration of electronic devices is required to be increased, so as to comply with current demands for lightness, thinness, shortness, smallness, and compactness. In order to improve the level of integration, not only dimensions of semiconductor devices can be reduced, but also the distance between semiconductor components can be decreased.
In general, contact plugs are formed between the gates to electrically connect the bit lines, and the contact plugs are electrically insulated from the gates by a barrier layer formed on the surfaces of the gates. For example, the gates and the openings disposed between the gates are formed on the substrate, and then a barrier layer is formed on the substrate to cover the surfaces of the gates and the surfaces of the sidewalls and the bottom portions of the openings entirely. After that, the barrier layer on the bottom portions of the openings is removed to expose the bit line, and then the contact plugs are formed in the openings to electrically connect with the bit lines. Nevertheless, in the above mentioned process, the barrier layer on the top corners of the gates is simultaneously removed by the etching process used to remove the barrier layer on the bottom portions of the openings, causing the barrier layer on the top corners of the gates rounded or even the gates being exposed. As such, the contact plugs subsequently formed in the openings are likely to electrically connect with the top corners of the gates exposed by the barrier layer, and the short may be occurred between the gates and the bit lines.